State machine design

From CSSEMediaWiki
(Difference between revisions)
Jump to: navigation, search
(Deleted old stuff)
Line 1: Line 1:
 
==Finite State Machine==
 
==Finite State Machine==
 
1. Design a simple finite state machine.
 
1. Design a simple finite state machine.
 +
2. Extend the design to allow deterministic or non-deterministic variants.

Revision as of 03:48, 23 September 2010

Finite State Machine

1. Design a simple finite state machine. 2. Extend the design to allow deterministic or non-deterministic variants.

Personal tools