State machine design
From CSSEMediaWiki
(Difference between revisions)
(Deleted last year's stuff) |
m (Reverted edits by Ebybymic (Talk); changed back to last version by Warwick Irwin) |
| (12 intermediate revisions by 5 users not shown) | |
Latest revision as of 03:21, 25 November 2010
Finite State Machine
1. Design a simple finite state machine.
2. Extend the design to allow deterministic or non-deterministic variants.
